Direct Digital Synthesizers: Theory, Design and Applications by Jouko Vankka

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By Jouko Vankka

A significant good thing about a right away electronic synthesizer (DDS) is that its output frequency, section and amplitude should be accurately and quickly manipulated less than electronic processor keep watch over. different inherent DDS attributes contain the facility to song with tremendous superb frequency and part solution, and to swiftly `hop' among frequencies. those mixed features have made the expertise renowned in army radar and communications platforms. actually, DDS know-how used to be formerly utilized nearly completely to high-end and armed forces purposes: it used to be expensive, power-hungry, tricky to enforce, and required a discrete excessive velocity D/A converter. because of superior built-in circuit (IC) applied sciences, they now current a doable replacement to analog-based phase-locked loop (PLL) know-how for producing agile analog output frequency in client synthesizer applications.
one can comprise assorted modulation services within the DDS by utilizing electronic sign processing (DSP) equipment, as the sign is in electronic shape. via programming the DDS, adaptive channel bandwidths, modulation codecs, frequency hopping and knowledge premiums are simply accomplished. the pliability of the DDS makes it excellent for sign generator for software program radio. The electronic circuits used to enforce signal-processing capabilities don't undergo the consequences of thermal float, getting older and part adaptations linked to their analog opposite numbers. The implementation of electronic practical blocks makes it attainable to accomplish a excessive measure of procedure integration. contemporary advances in IC fabrication know-how, relatively CMOS, coupled with complicated DSP algorithms and architectures are delivering attainable single-chip DDS suggestions to complicated verbal exchange and sign processing subsystems as modulators, demodulators, neighborhood oscillators, programmable clock turbines, and chirp turbines. The DDS addresses various purposes, together with cable modems, dimension equipments, arbitrary waveform turbines, mobile base stations and instant neighborhood loop base stations.
Direct electronic Synthesizers was once written to discover attainable purposes for radio communique structures. it's going to have allure for instant and wireline verbal exchange engineers, lecturers and students.

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For both modes the algorithm can be realized as an iterative sequence of additions/subtractions and shift operations which are rotations by a fixed rotation angle, but with a variable rotation direction. Due to the simplicity of the operations involved, the CORDIC is very well suited for a VLSI realization ([Sch86], [Dur87], [Lee89], [Not88], [Bu88], [Cav88a], [Cav88b], [Lan88], [Sar98], [Kun90], [Lee92], [Hu92b], [Fre95], [Hsi95], [Phi95], [Ahn98], [Dac98], [Mad99]). It has been implemented in pocket calculators like Hewlett Packard's HP-35 [Coc92], and in arithmetic coprocessors like Intel 8087.

13) NTclk where N is 2k (k is the number of bits used to calculate the sine-wave samples). 14) 2n(mL) M MN where (mL)M stands for mL modulo M. 15) that the finite sequence [A(r, L, M, N), r = 0, I, ... , M - I] is the discrete Fourier transform (DFT) of the sequence [(11M) e·j2mmfO/fcl\ m = 0, I, ... , M - I]; therefore, by Parseval's theorem, the sum of the squares ofl A(r, L, M, 1V) 1 for r = 0, I, ... e. M-I LIA(r,L,M,N)1 2 =1. (5. e. 15) IA(0,L,M,N)1 2 =[sin 2(JrIN) (JrIMN)2 ]. 18) There are three interesting properties ofl A(O, L, M, N) 12 worth mentioning: I) For M= 1,1 A(O, L, I, N) 12 = 1, hence there is no spurious harmonic component due to the 2) For a fixed N, 1A(O, L, M, N) 12 is a decreasing function of M.

In [Dup93], a different CSFR algorithm is proposed for the rotation mode. Using this "branching CORDIC", two iterations are performed in parallel if the sign cannot be estimated reliably, each assuming one of the possible choices for the rotation direction. It is shown in [Dup93] that at most two parallel branches can occur. However, this is equivalent to an almost twofold effort in terms of implementation complexity of the CORDIC rotation engine. In contrast to the above mentioned approaches, in [Daw96] transformations of the usual CORDIC iteration are developed resulting in a constant scale factor redundant implementation without additional or 31 branching iterations.

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